Graduation Internship Vacancy FPGA-Based Imaging Optimization
Vacature van BD Kiestra
R&D Software
About Us
BD Kiestra is part of Becton Dickinson (BD), a medical technology company that operates globally. BD Kiestra develops and produces high-quality, innovative automated laboratory systems for medical bacteriological laboratories. By automating laboratories, large quantities of samples are efficiently processed to enable faster patient treatment.
Our mission is to advance the world of health.
Why Choose BD?
BD Kiestra is an innovative company with enthusiastic, dedicated colleagues who have strong ties with the entire organization. The company has a pleasant, informal atmosphere where, as an employee, you have the opportunity and responsibility to take initiative and use your creativity. We build machines that can save patients’ lives by finding out earlier which medication helps!
Department
The R&D department consists of experienced electrical, software, and hardware engineers who are involved in developing new and improving existing BD Kiestra machines. Regularly, questions arise from customers that are initially answered by the Service Department and sometimes also by R&D.
Assignment Description
BD Kiestra utilizes high-resolution industrial cameras connected via CoaXPress (CXP) interface cards to capture detailed images of culture plates. For each plate, the imaging software captures multiple frames, dynamically adjusting camera parameters—such as exposure—between frames. This adjustment process involves analyzing every pixel in each frame to determine whether the image meets expected brightness and contrast levels, and then recalculating optimal camera settings accordingly.
Currently, this pixel-level analysis and parameter recalibration are performed on the host CPU. This approach is computationally intensive and can degrade system performance, especially under high processing loads or when handling large image datasets (e.g., 25MP images). The CXP interface card includes an onboard FPGA (Field-Programmable Gate Array)—a reconfigurable hardware component capable of executing parallelized, low-latency computations. By offloading image processing tasks to the FPGA, it is possible to reduce CPU load and improve overall system responsiveness, Accelerate image analysis and exposure adjustment, Enable real-time or near-real-time image optimization and to implement advanced imaging techniques such as HDR (High Dynamic Range) directly on the hardware.
Core Activities
• Investigate the technical feasibility of programming the FPGA on the CXP interface card.
• Evaluate the FPGA’s capability to analyze pixel data in real teim, calculate optimal exposure settings and merge multiple image frames into single output
• Develop a working prototype that demonstrates HDR imaging using the FPGA.

Interested?
Then send an email with your CV and motivation to willem.kaal@bd.com. We will respond to your application within a few days.
Contact
BD Kiestra
Marconilaan 6
9207 JC Drachten
T: +31 (0)512 799 730
W: www.bd.com/nl
E: willem.kaal@bd.com
Contact person: Willem Kaal
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